T Flip Flop Logic using PLC
This is PLC Program to implement T flip flop.
Implement T flip flop in PLC using ladder diagram programming language.
- We will use PLC S7-1200 for this application. We can implement this logic by using other PLC also.
- T flip flop has two inputs, one is clock input and other one is T (toggle) input.
- Ladder diagram of the T flip flop can be obtained by using T input in this flip flop.
- This can be done by rising edge instruction. But many PLC’s do not have such type of instruction. So for that PLCs we can use this logic.
List of inputs/outputs
List of inputs
- T (Toggle) :- I0.0
List of outputs
- output (Light) :- Q0.0
- One Shot (OS) logic output :- Q0.1
- Relay coil :- M0.0
PLC Ladder diagram
For easy understanding, here we assumed ” a Light ” is connected at output to check the flipflop logic status.
For this application we used S7-1200 PLC and TIA portal software for programming.
Network 1 :-
When T input (I0.0) is triggered, relay coil (M0.0) will go high immediately
Network 2 :-
During the second scan cycle, when Network 1 is scanned, status of Q0.1 is observed “1” .
Network 3 :-
When the network 3 is scanned, it receives input “1” from the image table which was set while scanning network 1. It triggers light output (Q0.0).
Even if T input is withdrawn, the light output (Q0.0) does not change. Even if the T input is withdrawn, the light output (Q0.0) does not change.
This logic can be implemented by using OSR instruction or rising edge of the PLC. Here we used only latching concept to hold the output.
Note:- This example is only for explanation purpose only. We can implement this logic in other PLC also. This is the simple concept of T flip flop, we can use this concept in other examples also.
All parameters considered in example are for explanation purpose only, parameters may be different in actual applications. Also all interlocks are not considered in the application.
Runtime Test Cases
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