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Inst Tools > Blog > PLC Tutorials > T Flip Flop PLC Ladder Diagram

T Flip Flop PLC Ladder Diagram

This is a PLC Program to implement T flip flop. Learn the ladder diagrams with example-based programming.

Last updated: November 3, 2023 12:27 pm
Editorial Staff
PLC Tutorials
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This is a PLC Program to implement T flip flop. Learn the ladder diagrams with example-based programming.

Contents
T Flip Flop Logic using PLCProblem DiagramProblem SolutionList of inputs & outputsList of inputsList of outputsM memoryPLC Ladder DiagramProgram DescriptionNetwork 1:Network 2:Network 3:Result

T Flip Flop Logic using PLC

Problem Description

Implement T flip flop in PLC using ladder diagram programming language.

Problem Diagram

T Flip Flop Logic using PLC Ladder Diagram

Problem Solution

We will use PLC S7-1200 for this application. We can implement this logic by using other PLC also.

T flip flop has two inputs, one is clock input and other one is T (toggle) input.

Ladder diagram of the T flip flop can be obtained by using T input in this flip flop.

This can be done by rising edge instruction. But many PLC’s do not have such type of instruction. So for that PLCs we can use this logic.

List of inputs & outputs

List of inputs

  • T (Toggle) :- I0.0

List of outputs

  • output (Light) :- Q0.0
  • One Shot (OS) logic output :- Q0.1

M memory

  • Relay coil :- M0.0

PLC Ladder Diagram

For easy understanding, here we assumed ” a Light ” is connected at output to check the flipflop logic status.

T Flip Flop PLC
T flip-flop PLC Ladder
PLC Logic T flip flop

Program Description

For this application, we used S7-1200 PLC and TIA portal software for programming.

Network 1:

When T input (I0.0) is triggered, relay coil (M0.0) will go high immediately

Network 2:

During the second scan cycle, when Network 1 is scanned, status of Q0.1 is observed “1” .

Network 3:

When the network 3 is scanned, it receives input “1” from the image table which was set while scanning network 1. It triggers light output (Q0.0).

Even if T input is withdrawn, the light output (Q0.0) does not change. Even if the T input is withdrawn, the light output (Q0.0) does not change.

This logic can be implemented by using OSR instruction or rising edge of the PLC. Here we used only latching concept to hold the output.

Note:- This example is only for explanation purpose only. We can implement this logic in other PLC also. This is the simple concept of T flip flop, we can use this concept in other examples also.

All parameters considered in example are for explanation purpose only, parameters may be different in actual applications. Also all interlocks are not considered in the application.

Result

T flipflop PLC ladder

Author: Bhavesh

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3 Comments
  • Archimedes says:
    September 9, 2018 at 8:14 pm

    thank you sir for all this helpfull articles! Just to inform you that i am still facing problems to download these tutorials to my PC even though i tried to use mozzilla as you told me earlier…Hope to find a solution to this problem. Thank you again!

    Reply
  • Jan Wieland says:
    March 12, 2021 at 7:26 pm

    In Network 1it should be %Q1.1 instead of %Q1.0.
    Otherwise it doesn´t work.

    Reply
  • Jan Wieland says:
    March 12, 2021 at 7:28 pm

    Oh, i meant %Q0.1 instead of %Q1.0, sorry

    Reply

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