Digital Electronics Objective Questions – Set 9

A gate is enabled when its enable input is at logic 1. The gate is

Which of the following gates cannot be used as an inverter?

The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either

Which of the following statements is true?

The output of a gate is HIGH when at least one of its inputs is LOW. It is true for

The output of a logic gate is 0 when all its inputs are at logic 0. The gate is either

A gate is disabled when its disable input is at logic 0. The gate is

The output of a logic gate is 0 when all its inputs are at logic 1. The gate is either

The output of a gate is LOW when at least one of its inputs is HIGH. This is true for

The output of a logic gate is 1 when all its inputs are at logic 0. The gate is either

An any or all gate is the other name of

A gate is inhibited when its inhibit input is at logic 1. The gate is

The output of a logic gate is 1 when all its inputs are at logic 1. The gate is either

A bubbled NAND gate is equivalent to a

The number of rows in the truth table of a 4-input gate is

The output of a gate is HIGH if and only if all its inputs are LOW. It is true for

The most suitable gate to check whether the number of 1s in a digital word is even or odd is

A bubbled AND gate is equivalent to a

The most suitable gate for comparing two bits is

A gate is enabled when its enable input is at logic 0. The gate is

For checking the parity of a digital word, it is preferable to use

Which of the following statements is true?

A bubbled OR gate is equivalent to a

An all or nothing gate is the other name of

A bubbled NOR gate is equivalent to a

The output of a logic gate is 1 when all its inputs are at logic 1. The gate is either

The output of a logic gate is 0 when all its inputs are at logic 0. The gate is either

Which of the following operations is commutative but not associative?

The output of a gate is LOW if and only if all its inputs are HIGH. It is true for

The number of rows in the truth table of a 4-input gate is