Counter Implementation Objective Questions
Digital Electronics Objective Questions
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As the number of flip flops are increased, the total propagation delay of
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A ripple counter’s speed is limited by the propagation delay of:
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A 4 bit modulo16 ripple counter uses JK flipflops. If the propagation delay of each flipflop is 50 nsec, the maximum clock frequency that can be used is equal to
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A ripple counter’s speed is limited by the propagation delay of:
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A glitch that appears on the decoded output of a ripple counter is often difficult to see on an oscilloscope because
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The main drawback of a ripple counter is that
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A 4bit ripple counter consists of flipflops, which each have a propagation delay from clock to Q output of 15 ns. For the counter to recycle from 1111 to 0000, it takes a total of __
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A 5bit asynchronous binary counter is made up of five flipflops, each with a 12 ns propagation delay. The total propagation delay (tp(tot)) is ______
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A reliable method for eliminating decoder spikes is the technique called _____
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Assume a 4bit ripple counter has a failure in the second flipflop such that it “locks up”. The third and fourth stages will
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What is the maximum delay that can occur if four flipflops are connected as a ripple counter and each flipflop has propagation delays of tPHL = 22 ns and tPLH = 15 ns?
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