Universal Shift Registers Objective Questions

A 4-bit shift register that receives 4 bits of parallel data will shift to the ________ by ________ position for each clock pulse.

To operate correctly, starting a ring shift counter requires:

A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________

An 8-bit serial in/serial out shift register is used with a clock frequency of 150 kHz. What is the time delay between the serial input and the Q3 output?

The primary purpose of a three-state buffer is usually:

How is an strobe signal used when serially loading a shift register?

What is the difference between a ring shift counter and a Johnson shift counter?

How many clock pulses will be required to completely load serially a 5-bit shift register?

A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?

What are the three output conditions of a three-state buffer?