4-Bit Parallel Adder/Subtractor Objective Questions

The main disadvantage of Manchester carry chain is

Ripple factor

Both propagation delay and capacitive load

Capacitive load

Propagation delay

Correct!

Wrong!

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Carry lookahead logic uses the concepts of

Inverting the inputs

Ripple factor

Generating and propagating carries

Complementing the outputs

Correct!

Wrong!

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What is Manchester carry chain?

Variation of a full-adder

Variation of a carry-lookahead adder

None of the Mentioned

Is a chain of controlled inverter

Correct!

Wrong!

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Fast-look-ahead carry circuits found in most 4-bit full-adder circuits which

Determine sign and magnitude

Reduce propagation delay

Increase ripple delay

Add a 1 to complemented inputs

Correct!

Wrong!

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One way to make a four-bit adder to perform subtraction is by:

Inverting the output

Inverting the carry-in

Inverting the B inputs

Grounding the B inputs

Correct!

Wrong!

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The carry propagation delay in 4-bit full-adder circuits:

Is cumulative for each stage and limits the speed at which arithmetic operations are performed

Is normally not a consideration because the delays are usually in the nanosecond range

Decreases in direct ratio to the total number of full-adder stages

Increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations

Correct!

Wrong!

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What is one disadvantage of the ripple-carry adder?

It is slow due to propagation time

All of the Mentioned

More stages are required to a full adder

The interconnections are more complex

Correct!

Wrong!

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The summing outputs of a half or full-adder are designated by which Greek symbol?

Sigma

Theta

Lambda

Omega

Correct!

Wrong!

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What distinguishes the look-ahead-carry adder?

It is faster than a ripple-carry adder

It is easier to implement logically than a full adder

It is slower than the ripple-carry adder

It requires advance knowledge of the final answer

Correct!

Wrong!

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Why is a fast-look-ahead carry circuit used in the 7483 4-bit full-adder?

To make it smaller

To slow down the circuit

To speed up the circuit

To decrease the cost

Correct!

Wrong!

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For a 4-bit parallel adder, if the carry-in is connected to a logical HIGH, the result is:

That carry-out will always be HIGH

The same as if the carry-in is tied LOW since the least significant carry-in is ignored

The carry-out is ignored

A one will be added to the final result

Correct!

Wrong!

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4-Bit Parallel Adder/Subtractor Objective Questions - Part 2

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4-Bit Parallel Adder/Subtractor Objective Questions - Part 2