Logic Gates and Networks Objective Questions
Digital Electronics Objective Questions
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The gates required to build a half adder are
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How many AND gates are required to realize Y = CD + EF + G ?
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How many twoinput AND and OR gates are required to realize Y = CD+EF+G?
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A full adder logic circuit will have
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Which of following are known as universal gates?
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The code where all successive numbers differ from their preceding number by single bit is
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The NOR gate output will be high if the two inputs are
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A universal logic gate is one which can be used to generate any logic function. Which of the following is a universal logic gate?
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The output of a logic gate is 1 when all the input are at logic 0 as shown below:
The gate is either
The gate is either
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The following switching functions are to be implemented using a decoder:
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be
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How many two input AND gates and two input OR gates are required to realize Y = BD + CE + AB?
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