| 1 | The 8085 Microprocessor uses ___ |
| 2 | The 8085 is based in a ___ |
| 3 | 8085 was introduced in ___ |
| 4 | The First Microprocessor was ___ |
| 5 | 8086 is interfaced to two 8259s (Programmable interrupt controllers) ___ |
| 6 | 8086 microprocessor is interfaced to 8253 a programmable interval timer ___ |
| 7 | Which of the following statements on DRAM are correct? |
| 8 | BURST refresh in DRAM is also called as ___ |
| 9 | For the most Static RAM the write pulse width should be at ___ |
| 10 | The 8279 normally provides a maximum of ___ |
| 11 | In 8279, the keyboard entries are de bounced and stored in an ___ |
| 12 | In 8279 Status Word, data is read when ___ |
| 13 | In 8279, a scanned sensor matrix mode, if a sensor changes its state, the ___ |
| 14 | In ADC 0808 if ___ pin high enables output |
| 15 | In 8255, under the I/O mode of operation we have ___ |
| 16 | Status register is also called as ___ |
| 17 | The address bus flow in ___ |
| 18 | The CPU removes the ___ signal to complete the memory write operation |
| 19 | The CPU sends out a ___ signal to indicate that valid data is available on the data bus |
| 20 | The lower red curvy arrow show that CPU places the address extracted from the ___ |
| 21 | A microprocessor retries instructions from ___ |
| 22 | Which RAM is created using MOS transistors ___ |
| 23 | Which type of RAM needs regular referred ___ |
| 24 | The RAM which is created using bipolar transistors is ___ |
| 25 | Customized ROMS are called ___ |
| 26 | Secondary memory is also called ___ |
| 27 | Secondary memory can store ___ |
| 28 | Which is the type of microcomputer memory ___ |
| 29 | Each memory location has ___ |
| 30 | Which is not the control bus signal ___ |
| 31 | The processor 80386/80486 and the Pentium processor uses ___ |
| 32 | The external system bus architecture is created using from ___ |
| 33 | The data in the stack is ___ |
| 34 | Which is used to store critical pieces of data during subroutines and ___ |
| 35 | BCD stands for ___ |
| 36 | Name of typical dedicated register is ___ |
| 37 | There are primarily two types of ___ |
| 38 | A set of register which contain are ___ |
| 39 | Accumulator based microprocessor example are ___ |
| 40 | What is the store by register? |
| 41 | Which is the microprocessor comprises ___ |
| 42 | The First electronic computer was completed in ___ |
| 43 | The address / data bus in 8085 is ___ |
| 44 | Pentium-I, Pentium-II, Pentium-III and Pentium-IV are recently introduced microprocessor by ___ |
| 45 | Which is a 8 bit Microprocessor? |
| 46 | In 1978 Intel introduced the 16 bit Microprocessor 8086 now called as ___ |
| 47 | ___ bit in ICW1 indicates whether the 8259A is cascade mode or not? |
| 48 | In 8279 Strobed input mode, the control line goes low ___ |
| 49 | Access time is faster for ___ |
| 50 | Address line for TRAP is? |
| 51 | 8088 microprocessor differs with 8086 microprocessor in ___ |
| 52 | In 8086 microprocessor one of the following statements is not true? |
| 53 | In 8086 microprocessor the following has the highest priority among all type interrupts? |
| 54 | BHE of 8086 microprocessor signal is used to interface the ___ |
| 55 | The advantage of memory mapped I/O over I/O mapped I/O is ___ |
| 56 | In 8086 the overflow flag is set when ___ |
| 57 | Address line for RST3 is? |
| 58 | Which processor structure is pipelined? |
| 59 | ___ can be used as stack |
| 60 | What does microprocessor speed depends on? |
| 61 | In 8086, Example for Non maskable interrupts are ___ |
| 62 | What is meant by maskable interrupts? |
| 63 | RIM is used to check whether, the ___ |
| 64 | What is SIM? |
| 65 | Why 8085 processor is called an 8 bit processor? |
| 66 | Which stack is used in 8085? |
| 67 | What are software interrupts? |
| 68 | Which interrupt is not level sensitive in 8085? |
| 69 | What are level Triggering interrupts? |
| 70 | What is the RST for the TRAP? |
| 71 | Which of the following is hardware interrupts? |
| 72 | In 8085 name the 16 bit registers? |
| 73 | Which interrupt has the highest priority? |
| 74 | RFID chip inside the tag is ___ |
| 75 | In RFID, the productivity enhancement is ___ |
| 76 | The information stored in RFID is ___ |
| 77 | RFID technology is a ___ |
| 78 | The inside of smart card contains an ___ |
| 79 | Which pin is a programmable peripheral interface? |
| 80 | What is DEN? |
| 81 | ALE stands for ___ |
| 82 | 8086 and 8088 contains ___ transistors |
| 83 | Expansion for HMOS technology ___ |
| 84 | The most common smart card application is ___ |
| 85 | The smart card uses a ___ |
| 86 | Smarts cards may have up to ___ |
| 87 | Smart card size is ___ |
| 88 | Smart card is made up of ___ |
| 89 | Another name for smart card ___ |
| 90 | Smart card is used to provide ___ |
| 91 | Smart Card on a microprocessor is ___ |
| 92 | What is a smart card? |
| 93 | What does the acronym RFID stand for? |
| 94 | In which year, 8088 was announced? |
| 95 | In which year, 8086 was introduced? |
| 96 | Compared with RS-232, USB is faster and ___ |
| 97 | Rs-232 was introduced in ___ |
| 98 | RS-232 is used in ___ |
| 99 | Which is the type of cache memory ___ |
| 100 | The cache usually gets its data from the ___ whenever the instruction or data is required by the CPU |
| 101 | Which is the small amount of highâ€speed memory used to work directly with the ___ |
| 102 | ___ is usually the first level of memory access by the microprocessor: |
| 103 | SBA stand for ___ |
| 104 | PA stand for ___ |
| 105 | The pin configuration of 8086 is available in the ___ |
| 106 | The physical address of memory is ___ |
| 107 | How many type of addressing in memory ___ |
| 108 | Which register containing the 8086/8088 flag ___ |
| 109 | Which has great important in modular programming ___ |
| 110 | The lower 8 bit are called ___ |
| 111 | In 8086 microprocessor the following has the highest priority among all ___ |
| 112 | The external device is connected to a pin called the ___ |
| 113 | The standard I/O is also called ___ |
| 114 | The microcomputer system by using the ___ device interface: |
| 115 | The ___ place the data from a register onto the data bus |
| 116 | DMA stands for ___ |
| 117 | Which are the READ operation can in ___ |
| 118 | MDR stands for ___ |
| 119 | WE stands for ___ |
| 120 | CS stands for ___ |
| 121 | When memory write or I/O read are active data is from the ___ |
| 122 | When memory read or I/O read are active data is to ___ |
| 123 | Which bus transfer singles from the CPU to external device and others that carry singles from ___ |
| 124 | CPU can read & write data by using ___ |
| 125 | A 16 bit address bus can generate ___ |
| 126 | Which bus carry addresses ___ |
| 127 | _____ a subsystem that transfer data between computer components inside a computer |
| 128 | MSD stands for ___ |
| 129 | The left side of any binary number is ___ |
| 130 | A nibble can be represented in the from of ___ |
| 131 | The 16 bit register is separated into groups of 4 bit where each groups is ___ |
| 132 | How many bit stored by status register ___ |
| 133 | SP stand for ___ |
| 134 | Which is the basic stack operation ___ |
| 135 | Stack words on ___ |
| 136 | The processor uses the stack to keep track of where the items are stored on ___ |
| 137 | The area of memory with addresses near zero are called ___ |
| 138 | The status register is also called the ___ |
| 139 | In which register instruction is decoded prepared and ultimately ___ |
| 140 | ___ Stores the instruction currently being executed |
| 141 | The overflow is operand by ___ |
| 142 | The zero is operand by ___ |
| 143 | The sign is operand by ___ |
| 144 | The carry is operand by ___ |
| 145 | Which are the flags of status register ___ |
| 146 | LA stands for ___ |
| 147 | Single address computer instruction has two parts ___ |
| 148 | How many parts of single address computer instruction ___ |
| 149 | How many bit of instruction on our simple computer consist of ___ |
| 150 | The act of acquiring an instruction is referred as the ___ |
| 151 | SP stands for ___ |
| 152 | IR stands for ___ |
| 153 | PC stands for ___ |
| 154 | Which register is a temporary storage location ___ |
| 155 | In Microprocessor one of the operands holds a special register ___ |
| 156 | The register section is related to ___ |
| 157 | In which form CPU provide output ___ |
| 158 | MOS stands for ___ |
| 159 | Which technology using the microprocessor is fabricated on a ___ |
| 160 | Which is the brain of computer ___ |
| 161 | Current SIMMs have either ___ |
| 162 | A/n ___ Device is any device that provides information, which is sent to the CPU |
| 163 | The term gigabyte refers to ___ |
| 164 | A directly accessible appointment calendar is feature of ___ |
| 165 | To locate a data item for storage is ___ |
| 166 | Which of the following is used for manufacturing chips? |
| 167 | Which of the following terms is the most closely related to main memory? |
| 168 | The first digital computer built with IC chips was known as ___ |
| 169 | The ALU of a computer normally contains a number of high speed ___ |
| 170 | The instructions for starting the computer are ___ |
| 171 | A computer consists of ___ |
| 172 | The metal disks, which are permanently housed in, sealed and contamination free ___ |
| 173 | The silicon chips used for data processing are ___ |
| 174 | An error in computer data is called ___ |
| 175 | A 32 bit microprocessor has the word length equal to ___ |
| 176 | Which of the following memories has the shortest access times? |
| 177 | Which of the following memories allows simultaneous read and write operations? |
| 178 | The secondary storage devices can only store data but they ___ |
| 179 | What is the responsibility of the logical unit in the CPU of a computer? |
| 180 | Can you tell what passes into and out from the computer ___ |
| 181 | Which part of the computer is used for calculating and comparing? |
| 182 | What are the three decisions making operations performed by the ALU of a computer? |
| 183 | The word length of a computer is measured in ___ |
| 184 | A typical personal computer used for business purposes would have ___ |
| 185 | Which company is the biggest player in the microprocessor industry? |
| 186 | Before a disk can be used to store data ___ |
| 187 | What type of memory is not directly addressable by the CPU and requires special software called EMS (expanded memory specification)? |
| 188 | Which is the type of memory for information that does not change on your computer? |
| 189 | The Width of a processor’s data path is measured in bits ___ |
| 190 | Which of the following items are examples of storage devices? |
| 191 | Most important advantage of an IC is ___ |
| 192 | An integrated circuit is ___ |
| 193 | The first microprocessor built by the Intel Corporation was ___ |
| 194 | One of the main feature that distinguish microprocessors from ___ |
| 195 | Registers, which are partially visible to users and used to hold ___ |
| 196 | Which of the following memory medium is not used as main memory system? |
| 197 | The memory which is programmed at the time it is ___ |
| 198 | Which of the following memories needs refresh? |
| 199 | Which of the following is used as a primary storage device? |
| 200 | The language that the computer can understand and ___ |
| 201 | Different components n the motherboard of a PC unit are linked together by sets of ___ |
| 202 | Which of the following are the two main components of the CPU? |
| 203 | INTR: it implies the ___ |
| 204 | Which is responsible for all the outside world communication by the ___ |
| 205 | Which causes the microprocessor to immediately terminate its ___ |
| 206 | Microprocessor reference that are not available in the cache are called ___ |
| 207 | Microprocessor reference that are available in the cache are called ___ |
| 208 | The cache usually gets its data from the ___ whenever the instruction or data is required |
| 209 | Which is the small amount of highâ€speed memory used to work directly with ___ |
| 210 | ___ is usually the first level of memory access by the microprocessor |
| 211 | Which are the factor of cache memory ___ |
| 212 | The offset of a particular segment varies from ___ |
| 213 | ___ is the most important segment and it contains the actual assembly language instruction to be executed |
| 214 | NMI stand for ___ |
| 215 | ALE stand for ___ |
| 216 | SI stand for ___ |
| 217 | DI stand for ___ |
| 218 | BP stand for ___ |
| 219 | EA stand for ___ |
| 220 | DIP stand for ___ |
| 221 | The pin configuration of 8086 is available in ___ |
| 222 | The ___ address of a memory is a 20 bit address for the 8086 microprocessor: |
| 223 | The size of each segment in 8086 is ___ |
| 224 | How many type of addressing in ___ |
| 225 | How many bits the instruction pointer is ___ |
| 226 | The acculatator is 16 bit wide and is ___ |
| 227 | Which are the segment ___ |
| 228 | DS Stand for ___ |
| 229 | CS Stand for ___ |
| 230 | IP Stand for ___ |
| 231 | The four index register can be used for ___ |
| 232 | Eight of the register are known as ___ |
| 233 | Which are the four categories of ___ |
| 234 | EU stand for ___ |
| 235 | BIU stand for ___ |
| 236 | Expansion of DCE ___ |
| 237 | Expansion for DTE is ___ |
| 238 | An RS-232 interface is ___ |
| 239 | There are ___ segment LEDs in scanned multiplexed displays |
| 240 | These are ___ common cathode in scanned multiplexed displays |
| 241 | The output line of interfacing circuit is used ___ |
| 242 | The ___ provide the capability of eight I/o ports in interfacing circuit |
| 243 | The ___ is called segment |
| 244 | The ___ reduces the number of connections, thus the number of interfacing device required |
| 245 | ___ is a commonly used input device when more than 8 key are necessary |
| 246 | The SN75491 and SN75492 has ___ |
| 247 | I/o ports of programmable devices are limited in current capacity, therefore, additional transistors or ___ |
| 248 | In multiplexing, the data lines and output ports are time shared by ___ |
| 249 | The number of hardware chips needed for multiple digit display can be minimized by using the technique ___ |
| 250 | ___ is a co-processor |
| 251 | ___ family supports both a math co processor and cache memory |
| 252 | ___ version did not have a 16-bit external architecture |
| 253 | 80486DX was followed by ___ |
| 254 | ___ maintains real modes protected-mode software compatibility with 80386 architecture |
| 255 | The 80486 family was introduced in the year ___ |
| 256 | The 80386DX has both 32 bit internal registers ___ |
| 257 | The 80386DX is a full ___ |
| 258 | Which device is high-performance member of the 80386 family of MPUs? |
| 259 | The 80386DX MPU is the ___ |
| 260 | Which family was the sixth member of 8086 family of microprocessors? |
| 261 | In which year, 80386 microprocessor was introduced? |
| 262 | The 80386 Microprocessor family is a ___ |
| 263 | In Pentium III processor, the P6 micro architecture is enriched with an additional ___ |
| 264 | Pentium III processor is manufactured using ___ |
| 265 | Pentium III processor was introduced in ___ |
| 266 | ECC & FRC were first introduced in ___ |
| 267 | Backside bus between L2 cache and MPU is ___ |
| 268 | The maximum speed of Pentium II processor is increased to ___ |
| 269 | The system bus of both Pentium pro and Pentium II processors carry ___ |
| 270 | How many buses provided in Pentium II processor? |
| 271 | Dual independent bus architecture was first introduced in ___ |
| 272 | Pentium II xeon processor offers ___ performance than the std Pentium II processor |
| 273 | ___ followed Celeron processor and Pentium II Xeon processor |
| 274 | Pentium II processor was introduced in the ___ |
| 275 | Pentium II processor is a ___ |
| 276 | Pentium processor with MMX technology includes ___ |
| 277 | ___ is performed to determine the best order of for execution of instructions |
| 278 | Micro architecture employs ___ execution |
| 279 | Pentium-pro processor design implements ___ |
| 280 | The circuitry of the Pentium pro processor is equivalent to ___ |
| 281 | In Pentium-pro processor, dies are manufactured using ___ |
| 282 | Pentium pro processor has ___ die |
| 283 | Expansion of SPGA is ___ |
| 284 | ___ is used in desktop and laptop personal computers |
| 285 | _______ has been enhanced to provide higher performance for multimedia & communication applications |
| 286 | In which year, Pentium pro processor introduced? |
| 287 | Pentium pro processor is a ___ generation of device |
| 288 | Who introduced Pentium family? |
| 289 | Synchronization bit at the beginning of character is ___ |
| 290 | ___ is used to eliminate clock signal |
| 291 | ___ is used in high speed transfer is required |
| 292 | There are ___ different types of interface in micro computer system |
| 293 | The ___ in 8237 operates in either master or in slave mode |
| 294 | The ___ allow data transfer between memory and peripherals |
| 295 | The internal block of 8237 consists of ___ |
| 296 | The ___ is constructed for the desired mode and return into control register |
| 297 | The ___ generates output way forms on the out and output line |
| 298 | The ___ input is used to enable or disable |
| 299 | The clock signal of frequency upto ___ is supplied to clock input |
| 300 | The ___ input is connected to an output of the address decoder |
| 301 | The data lines is used to ___ |
| 302 | In 8254 there are ___ |
| 303 | The data bus buffer is ___ |
| 304 | The 8254 contains ___ |
| 305 | ___ is used to refresh D-Ram and regular intervals and provide timing signals |
| 306 | ___ is useful for the generation of accurate time delay |
| 307 | The ___ input to 8255A is usually activated by Microprocessor in system |
| 308 | The port lines are connected to data lines of the ___ |
| 309 | The ___ are connected to 2 address bus line in system |
| 310 | The address bus enables the ___ |
| 311 | There are ___ address bus in 8255A |
| 312 | ___ are transferred on the data lines between microprocessor and internal port or control register |
| 313 | The pins are ___ data lines and are connected to data bus in system |
| 314 | 8255A operates with ___ |
| 315 | The 8255A is available with ___ |
| 316 | Port A and Port B are used individually as ___ |
| 317 | In 8255A, there are ___ |
| 318 | The device such as buffer and batches are ___ |
| 319 | Data transfer between the microprocessor for peripheral takes ___ |
| 320 | In 8255 A ___ is used to perform bidirectional operation |
| 321 | In 8255A ___ is used for handshaking operation |
| 322 | In 8255A ___ is used for input operation |
| 323 | ___ performs the address decode operation |
| 324 | ___ is used to transfer address connect to address block |
| 325 | The read and write operation is done using ___ |
| 326 | In 8255A the ___ is controlled by control registers |
| 327 | 8255A contains ___ ports each of 8 bit lines |
| 328 | ___ is used to transfer data between microprocessor and I/O process |
| 329 | The 8259A is used to manage ___ |
| 330 | The 8259-A is a ___ |
| 331 | CS connect the output of ___ |
| 332 | OCW1 is used to set and read ___ |
| 333 | The ___ is used to connect more microproces |
| 334 | The ___ pin is used to select direct command word |
| 335 | ___ generate interrupt signal to microprocessor and receive acknowledge |
| 336 | ___ decides the request of interrupt to be serviced |
| 337 | Bits in IRR interrupt are ___ |
| 338 | ___ signal prevent the microprocessor from reading the same data more than one |
| 339 | ___ means at irregular internals |
| 340 | ___ means at the same time, the transmitter and receiver are synchronized |
| 341 | Designing logic circuits and writing instructions to enable the microprocessor to communicate with ___ |
| 342 | The primary function of the ___ |
| 343 | An ___ is used to fetch one address |
| 344 | The memory chips such as 2732 EPROM and ___ |
| 345 | ___ has certain signal requirements write into and read from its registers |
| 346 | Memory is an integral part of a ___ |
| 347 | ___ signal is generated by combining RD and WR signals with IO/M |
| 348 | The remaining address line of ___ |
| 349 | To interface memory with the microprocessor, connect register the lines of the address bus must be added to ___ |
| 350 | Microprocessor provides signal like ___ |
| 351 | The ___ of the memory chip will identify and select the register |
| 352 | The Microprocessor places 16 bit address on the add lines from that address by ___ |
| 353 | The Microprocessor places ___ |
| 354 | To perform any operations, the Mp should identify the ___ |
| 355 | Primary function of memory interfacing is that the ___ |
| 356 | The main concerns of the ___ |
| 357 | A ___ Instruction at the end of interrupt service program takes the execution back |
| 358 | The ___ bus controller device decodes the signals to produce the control bus signal |
| 359 | In max mode, control bus signal S0, S1 and S2 are ___ |
| 360 | If MN/MX is low the 8086 operates in ___ |
| 361 | In a minimum mode there is a ___ |
| 362 | The RD,WR,M/IO is the heart of control for a ___ |
| 363 | The functions of Pins from 24 to 31 depend on the mode in ___ |
| 364 | ___ is used to write into memory |
| 365 | The address bits are sent out on lines through ___ |
| 366 | The pin of minimum mode AD0- AD15 has ___ |
| 367 | The pin of minimum mode AD0-AD15 has ___ |
| 368 | The ___ is required to synchronize the internal operands |
| 369 | The BIU contains FIFO register of size 6 bytes called _____ |
| 370 | The 8086 fetches instruction one after another from ___ |
| 371 | The ___ contains an offset instead of actual address |
| 372 | The ___ translates a byte from one code to another code |
| 373 | The LES copies to words from memory to ___ |
| 374 | The microprocessor determines whether the specified condition exists or ___ |
| 375 | The conditional branch instruction specify ___ |
| 376 | Instruction providing both segment base and offset address are ___ |
| 377 | The JS is called as ___ |
| 378 | ___ destination inverts each bit of destination |
| 379 | IMUL source is a signed ___ |
| 380 | Inc destination increments the content of ___ |
| 381 | LDs copies to consecutive words from memory to ___ |
| 382 | The push source copies a word from source to ___ |
| 383 | The IP is ___ |
| 384 | The CS register stores instruction ___ |
| 385 | The DS is called as ___ |
| 386 | The 1 MB byte of memory can be divided into ___ |
| 387 | The BIU prefetches the instruction from memory and ___ |
| 388 | The BIU contains FIFO register of ___ |
| 389 | The index register are used to ___ |
| 390 | The SS is called as ___ |
| 391 | The BP is indicated by ___ |
| 392 | The SP is indicated by ___ |
| 393 | The register AX is formed by ___ |
| 394 | The IF is called as ___ |
| 395 | The SF is called as ___ |
| 396 | The CF is known as ___ |
| 397 | The 16 bit flag of 8086 microprocessor is responsible to ___ |
| 398 | The work of EU is ___ |
| 399 | In 8086 microprocessor , the address bus is ___ |
| 400 | The microprocessor can read/write 16 bit data from ___ |
| 401 | The intel 8086 microprocessor is ___ |
| 402 | In 1960’s texas institute invented ___ |
| 403 | The first digital electronic computer was built in ___ |
| 404 | The purpose of the microprocessor is ___ |
| 405 | Microprocessor is the ___ of the computer |
| 406 | Microprocessor is a/an ___ |
| 407 | A microprocessor is a ___ chip integrating all the functions of a CPU of a computer |
| 408 | About the Microprocessor & Microcontroller MCQ category |